Manual for MZ-3500

The MZ-3500 system operates in four memory states (SD0-SD3) determined by hardware and software configurations.

SD0 (Initialize State): Occurs immediately after power-on. The main CPU loads the Initial Program Loader (IPL) into RAM and resets the sub-CPU. The system then assigns memory areas for subsequent states (SD1, SD2, SD3).

SD1 (System Loading & CP/M): The operating system is loaded in CP/M mode. The sub-CPU initializes I/O ports and receives the IOCS and bootstrap routine from the main CPU, which loads information from the floppy disk.

SD2 (ROM based BASIC): Active when SHARP BASIC is executed from ROM. The main CPU manages memory bank selection for different areas.

SD3 (RAM based BASIC): Active when SHARP BASIC is loaded from the floppy disk into RAM. The system state is determined by the bootstrap program before loading the system program.